A CPU, built from
first principles

A custom 16-bit RISC ISA, an assembler and cycle-accurate emulator written in Rust, compiled to WebAssembly, and wired to an animated datapath diagram.

✓ Running purely in the browser. Zero dependencies.

Open Emulator Start Lab 1

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Under the hood

Every layer built from scratch

Rust emulator core

Backend Layer

Custom ISA, two-pass assembler, ALU, memory subsystem, and cycle-accurate fetch-decode-execute, all unit-tested natively then compiled to WASM.

Rustwasm-packwasm-bindgen

WASM bindings

Bridge Layer

A thin JS boundary exposes Rust-defined functions. Each step returns a structured delta.

wasm-bindgenTypeScriptJSON delta

Animated datapath

Frontend Layer

SVG datapath with wire animations driven by the step delta. CodeMirror editor with a custom assembly syntax highlighter.

Next.jsSVGCodeMirror 6Tailwind

Educational Labs

Experiments, live in the browser

Basic ALU Operations — Adding Two Numbers

Load two immediates into registers, pass them through the ALU, and observe the result wire up to a destination register. The foundation computation.

rs1_to_alurs2_to_alualu_to_rd

Control Flow — Building a Loop

The program counter is just a number. JMPZ changes it conditionally. Watch a countdown loop execute and observe exactly when the zero flag gates the branch.

alu_to_flagsalu_to_pc

Memory-Mapped I/O — Controlling External Hardware

Address 0xFFFF is the output register. A STORE instruction triggers it. The puzzle: LOADI only holds 6 bits — how do you load 65535 into a register?

rs1_to_ramrd_to_mmio

Instruction Set

12 instructions. Turing complete.

Architecture: 16-bit word size

Opcode	Mnemonic	Syntax	Semantics
0000	ADD	ADDRDRS1RS2	RD ← RS1 + RS2; set Z
0001	SUB	SUBRDRS1RS2	RD ← RS1 − RS2; set Z
0010	AND	ANDRDRS1RS2	RD ← RS1 & RS2; set Z
0011	OR	ORRDRS1RS2	RD ← RS1 \| RS2; set Z
0100	NOT	NOTRDRS1	RD ← ~RS1; set Z
0101	LOADI	LOADIRDIMM6	RD ← sign-extend(IMM6); set Z
0110	LOAD	LOADRDRS1	RD ← MEM[RS1]
0111	STORE	STORERS1RS2	MEM[RS2] ← RS1
1000	JMP	JMPADDR9	PC ← ADDR9
1001	JMPZ	JMPZADDR9	PC ← ADDR9 if Z
1010	ADDI	ADDIRDRS1IMM6	RD ← RS1 + sign-extend(IMM6)
1111	HALT	HALT	Stop execution

Ready to step through code?

Write assembly, compile it on the fly, and watch the electrical signals flow through the datapath on every clock cycle.

Launch Emulator

A CPU, built from first principles